The x86 instruction set architecture allows for a large number of addressing modes to access individual BYTEs, WORDs, and DWORDs of memory. There are no alignment restrictions by default, although aligned accesses are faster and alignment checking may be turned on by the operating system. Memory addresses may be formed with either 16-bit or 32-bit registers. Due to the way addresses are encoded in the machine code, addressing with 16-bit registers is much more restrictive in terms of register combinations that may be used.
The only 16-bit registers that may be used to address memory are BX, BP, SI, and DI. Only 0 or 1 of each of (BX, BP) and (SI, DI), as well as an integer displacement, may be used in the formation of an address. The default segment is DS except when BP is one of the registers specified, in which case the default segment is SS. Table 4-1 enumerates all possible combinations of 16-bit register addressing.
When 32-bit registers are used in an address, many more combinations of registers are allowed. Any register may be used as a base register and added to any register, except for ESP, as an index with a constant multiplier of 1, 2, 4, or 8, which is then added to an integer displacement. The default segment is DS except when EBP or ESP is used as the base register, in which case the default segment is SS. Table 4-2 gives some examples of valid 32-bit addresses.
Table 4-2. Examples of Valid 32-bit Register Addresses
| Address (disp is optional) | Default Segment | Notes |
|---|---|---|
| [ECX+EBP*1+disp] | DS | EBP is the index register, but the base register is ECX, so the default segment is DS. |
| [EBP+ECX*1+disp] | SS | EBP is the base register, so the default segment is SS. |
| [ESI+EDI*4+disp] | DS | |
| [ESP+EAX*8+disp] | SS | |
| [EBP+disp] | SS | |
| [EBP*2+disp] | DS | EBP is the index register, so the default segment is DS. |
| [EDX+disp] | DS | |
| [disp] | DS |