Spring 2009
ECE 498 AL : Programming Massively Parallel Processors
	| Home Page | Announcements | Syllabus/ Lectures | Machine Problems | Hall of Fame | Exam | Grades | Web board | Final Project | Presentations | Archives - Prev. Semesters	Course Objectives Virtually all semiconductor market domains, including PCs, game consoles, mobile handsets, servers, supercomputers, and networks, are converging to concurrent platforms. There are two important reasons for this trend. First, these concurrent processors can potentially offer more effective use of chip space and power than traditional monolithic microprocessors for many demanding applications. Second, an increasing number of applications that traditionally used Application Specific Integrated Circuits (ASICs) are now implemented with concurrent processors in order to improve functionality and reduce engineering cost. The real challenge is to develop applications software that effectively uses these concurrent processors to achieve efficiency and performance goals. The aim of this course is to provide students with knowledge and hands-on experience in developing applications software for processors with massively parallel computing resources. In general, we refer to a processor as massively parallel if it has the ability to complete more than 64 arithmetic operations per clock cycle. Today’s NVIDIA processors already exhibit this capability. Processors from Intel, AMD, and IBM will begin to qualify as massively parallel in the next several years. Effectively programming these processors will require in-depth knowledge about parallel programming principles, as well as the parallelism models, communication models, and resource limitations of these processors. The target audiences of the course are students who want to develop exciting applications for these processors, as well as those who want to develop programming tools and future implementations for these processors. We will be using NVIDIA processors and the CUDA™ programming tools in the lab section of the course. Many have reported success in performing non-graphics parallel computation as well as traditional graphics rendering computation on these processors. You will go through structured programming assignments before being turned loose on the final project. Each programming assignment will involve successively more sophisticated programming skills. The final project will be of your own design, with the requirement that the project must involve a demanding application such as mathematics- or physics-intensive simulation or other data-intensive computation, followed by some form of visualization and display of results. This is a course in programming massively parallel processors for general computation. We are fortunate to have the support and presence of David Kirk, the Chief Scientist of NVIDIA and one of the main driving forces behind the new NVIDIA CUDA™ technology. Building on architecture knowledge from ECE 411, and general C programming knowledge, we will expose you to the tools and techniques you will need to attack a real-world application for the final project. The final projects will be supported by some real application groups at UIUC and around the country, such as biomedical imaging and physical simulation. Contact Information Instructor: Wen-Mei Hwu. Office: 215 CSL, E-mail: w-hwu@illinois.edu, Phone: 244-8270 Teaching Assistant: John Stratton. Office: 223 CSL, E-mail: stratton@illinois.edu, Phone: 333-4171 Lecture and Office Hours Lecture: 9:30-10:50 AM, Tu Th, 1105 Siebel Center. Regular makeup lecture time Wed 5:00-6:30 PM (selected weeks) Instructor office hours:Wednesdays 2-3:30pm Course TA office hours:Mondays 2-3pm, Fridays 3-4pm Course Essentials Prerequisites: ECE 411 (or equivalent), or CS 225 and CS 433 (Or equivalents). Textbook: Will be made available online. A useful reference book is: Timothy G. Mattson, Beverly A. Sanders, Berna L. Massingill, Patterns for Parallel Programming, Addison Wesley Grading policy: Test: 20% Labs: 30% - Demo/knowledge: 25% - Functionality: 40% - Report: 35% Project: 50% - Design Document: 25% - Project Presentation: 25% - Demo/Final Report: 50% Regrade policy Integrity policy Late submission policy We will be implementing a policy based on "bonus days." Each student will be granted five bonus days, which are no-questions-asked one-day extensions which may be applied to most assignments. For group assignments, each person in the group must expend a personal bonus day for the group's extension. Weekends and holidays are not considered to determine the number of days of extension, (so Friday-Monday would count as a single day of extension.) Multiple bonus days may be applied to any valid assignment. However, they may not be applied to the exam, final project design documents, final project presentations, or the final project demonstration. To use a bonus day, you must download, print and sign the bonus day submission form, and attach it to the item you are submitting. Groups must have each member sign the form. The penalty for late submissions after any bonus points are considered is 10% per day late. Weekends and holidays will not count towards this penalty, as with the bonus points. Please submit the bonus day forms to class after it is signed. Exam times and locations: TBA
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