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ECE 598YC: Advanced
Topics IN Analog IC Design Fall 2006 |
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Announcement | Course Info | CAD Tools |
Homework
| Exams
| Term Project
| Lecture Notes |
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▪ ▪ Sample final exam and its
solution are posted. Good luck on the final exams. ▪ For all the resistors used
in the Flash ADC, please add the parasitic capacitors. ▪ The spectre model
equivalent to the hspice model is posted. If you need in the project, you may
use it. ▪ PS5 and PS6 are posted. ▪ Solutions for PS3 are
posted. ▪ Final project is posted. ▪ Please stop by Wenbo’s
office to pick up your midterm exam sheet. The grade statistics is posted. ▪ PS4 is posted and due on
Nov. 9th. ▪ PS3 is posted and due on
Nov. 2nd. ▪ The solutions for sample
exams are posted. ▪ The solution for PS2 is
posted. ▪ The solution for PS1 is
posted. ▪
Sample exams are posted. ▪ PS2 is assigned. Due date
is Oct. 26th 2006. ▪
Return ratio slides and SPICE files are posted. ▪
Reading assignments are posted. ▪
PS1 is assigned. Due date is Sep. 28th 2006. ▪ The textbooks are reserved
at Grainger Engineering Library. ▪ The TA’s OH is changed to
Mon. 3-5pm. ▪ (8/28) Our new mtg time
and classroom for 598 YC are 3:30-4:50pm TR, 1105 Siebel Center. ▪ (8/28) Starting 8/29,
Tue., the class will meet at 3:30-4:50pm, 1105 Siebel Center. ▪
(8/28) Course website is up and running. All course-related materials will be
posted here. |
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This
course covers the advanced analog-digital interface circuits in modern VLSI
digital communication systems. The course will investigate noise in linear circuits,
linear feedback, harmonic distortion in weakly nonlinear circuits,
switched-capacitor circuits, Nyquist-rate data converters, and over-sampled
data converters. As the major
advancement in this field was developed using CMOS technology in the past
decade, the course will focus on CMOS
building blocks and circuit techniques that implement these interface
functions. Extensive computer simulations are required in both the homework
and the final project. Course syllabus Instructor: Yun Chiu, CSL 412, chiu@uivlsi.csl.uiuc.edu.
OH: Wed. 2-3pm in CSL-412. TA: Wenbo Liu, CSL 422, wliu8@uiuc.edu. OH: Mon. 3-5pm in CSL-422. Prerequisites: ECE483 (G&M), ECE410
(O&S). Grading: |
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·
UIUC ·
ECE ·
EWS ·
CSL ·
Library ·
Google |
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▪ Homework: |
15% |
Biweekly, no credit for late homework |
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▪ Midterm: |
20% |
In class, Oct. 19th, Thru. |
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▪ Term Project: |
30% |
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▪ Term Project: |
5% |
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▪ Final Exam: |
30% |
7:00-10:00
PM, Wednesday, December 13 |
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Grading Policy: No similar homework, design projects, or exams
will be given credit. |
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No
textbook required. But the following reference texts will be reserved in the
Grainger Engineering library. |
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▪ Gregorian et al., Analog MOS
Integrated Circuits for Signal Processing, Wiley, 1986. |
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▪ Razavi, Principles of Data
Conversion System Design, IEEE Press, 1995. |
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▪ van de Plassche, CMOS Integrated
Analog-to-Digital and Digital-to-Analog Converters, Kluwer, 2003. |
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▪ Norsworthy et al., Delta-Sigma
Data Converters: Theory, Design, and Simulation, Wiley, 1996. |
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▪
Gray, et al., Analysis and Design of Analog Integrated Circuits (4th Ed.),
Wiley, 2001. |
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▪
MATLAB, Simulink Mixed-domain behavioral
modeling, analog/digital filter synthesis, and etc. ▪
Spectre RF SPICE-type
analyses: .dc, .ac, .xf, .noise, .tran, and etc. Additional
capabilities: pss, pac, pxf, pnoise, pdisto to analyze large-signal nonlinear
circuits (e.g., switched-apacitor circuits, RF circuits). ▪
awd, ocean, icfb, msfb, icde, icms, and etc. Cadence GUI suite
for design entry, layout, waveform display, and etc. Helpful
Links ▪ Affirma Spectre RF
Simulator User Guide (v446) ▪ Affirma
Spectre RF Simulator Theory (v446) Class
account EWS
class accounts available: http://www.ews.uiuc.edu/. EWS Manager: manager@ews.uiuc.edu. |
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PS2 (G&M 8.7, 8.8, 8.9, 8.10, 8.15, 8.25, 8.26, 8.33), models |
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Midterm is scheduled for 10/19, Th. (in two weeks), in class. Midterm is open-book, open-notes, calculators allowed. Midterm coverage is up to the last lecture before midterm. 598 Midterm Solution483 Final Solution Grade Statistics SolutionSample Final Exam SolutionFinal Exam Solution |
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Project Description Model
File Spectre Model Parasitic
capacitance |
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Lecture1 Return
Ratio (SPICE) Switch
Capacitor ADC Review ADC
Architecture Flash_ADC Comparator Flash Techniques |
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Reading Assignments |
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Thermal Noise of Two-Stage Miller OTA Single-loop Feedback Analysis (Part I): Return Ratio (RR) Single-loop Feedback Analysis
(Part II): Loopgain
A Comparison of Two Approaches to
Feedback Circuits Analysis Exact Simulation of Feedback
Circuit Parameters Determination
of Stability Using Return Ratios in Balanced Fully Differential Feedback
Circuits Single Tone, Two Tone and Three Tone Test |
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